HomeDLSU Engineering Journalvol. 18 no. 1 (2006)

A VHDL Hardware Model of the ITU-T G.728 Standard with a Synthesizable Code Book Search Module

Ser Christian R. Del Cano | Jonathan S. Hernando | Narciso D. Faustino Jr. | Michael Adrian L. Lu | Arnold Benedict U. Tan Casis | Engineer Edzel R. Lapira

Discipline: Engineering, Technology



The transmission of audio signals over a medium of limited bandwidth has been a longtime problem that had caused several compression schemes to be developed over the years. For audio signals the compression scheme that is to be implemented must be able to perform compression fast enough so that the delay would not be noticeable. An ITUT standard for low delay code excited linear prediction algorithm known as G. 728 is one of the best solutions developed to address the specific need. The research includes the hardware model of the G. 728 encoder implemented in VHDL and a G.728 decoder implemented in C language.